Um Acelerador Ray-Tracing de Baixo Custo Otimizado para Arquiteturas Heterogêneas

Abstract

One of the biggest challenges in computer graphics is to produce photo-realistic and phycally accurate images from a three-dimensional scene. On one hand, there are fast ways of rendering an image that often cannot accurately portray the behavior of light when interacting with objects. On the other hand, the most accurate methods, like the Ray-Tracing algorithm, allow for the correct modeling of optical effect with less effort, but at the expense of execution time. Many new techniques were conceived with the purpose of accelerating ray-tracing applications, including the use of different hardware platforms. Among them is the development of specialized architectures in Field-Programmable Gate Arrays (FPGAs), especially given its flexibility and low energy cost. Thus, this work proposes and analyzes an accelerator to efficiently perform Ray-Triangle intersection calculations and two of the possible applications for it. Experimental results yield the viability of the proposed accelerator, where the parallel version of the accelerator could obtain performance gains of _ 4.7 in relation to the ARM implementation and the heterogeneous version obtained gain of _ 6.3 times the performance. Furthermore, by using the embedded board as the edge in an edge computing system (Edge + Cloud), it was possible to achieve a 50% of performance gains in comparison with only using a cloud.